Kingston KHX2000C9AD3T1K3/6GX

DESCRIPTION
Kingston's KHX2000C9AD3T1K3/6GX is a kit of three 256M x
64-bit (2GB) DDR3-2000 CL9 SDRAM (Synchronous DRAM),
1Rx8 memory modules, based on eight 256M x 8-bit FBGA
components per module. Each module kit supports
Intel
®
XMP
(Extreme Memory Profiles). Total kit capacity is 6GB. Each
module kit has been tested to run at DDR3-2000 at a low
latency timing of 9-10-9-27 at 1.65V. The SPDs are pro-
grammed to JEDEC standard latency DDR3-1333 timing of
9-9-9 at 1.5V. Each 240-pin DIMM uses gold contact fingers.
The JEDEC standard electrical and mechanical specifications
are as follows:

XMP TIMING PARAMETERS
•
JEDEC: DDR3-1333 CL9-9-9 @1.5V
•
XMP Profile #1: D3-2000 CL9-10-9-27 @1.65V
•
XMP Profile #2: D3-1866 CL9-10-9-27 @1.65V

SPECIFICATIONS
CL(IDD)
9 cycles
Row Cycle Time (tRCmin)
49.5ns (min.)
Refresh to Active/Refresh
160ns (min.)
Command Time (tRFCmin)
Row Active Time (tRASmin)
36ns (min.)
Power (Operating)
1.125 W* (per module)
UL Rating
94 V - 0
Operating Temperature
0
o
C to 85
o
C
Storage Temperature
-55
o
C to +100
o
C
*Power will vary depending on the SDRAM used.
FEATURES
•
JEDEC standard 1.5V (1.425V ~ 1.575V) Power Supply
•
VDDQ = 1.5V (1.425V ~ 1.575V)
•
667MHz fCK for 1333Mb/sec/pin
•
8 independent internal bank
•
Programmable CAS Latency: 9, 8, 7, 6
•
Programmable Additive Latency: 0, CL - 2, or CL - 1 clock
•
Programmable CAS Write Latency(CWL) = 7 (DDR3-1333)
•
8-bit pre-fetch
•
Burst Length: 8 (Interleave without any limit, sequential with
starting address "000" only), 4 with tCCD = 4 which does not
allow seamless read or write [either on the fly using A12 or
MRS]
•
Bi-directional Differential Data Strobe
•
Internal(self) calibration : Internal self calibration through ZQ
pin (RZQ : 240 ohm ± 1%)
•
On Die Termination using ODT pin
•
Average Refresh Period 7.8us at lower than TCASE 85°C,
3.9us at 85°C < TCASE
< 95°C
•
Asynchronous Reset
•
PCB : Height 2.401" (61.00mm) w/ heatsink, single sided
component